Vivado IP Release Notes
This article contains a list of all 'Vivado IP Release Notes - All IP Change Log Information' answer records and the associated Vivado™ Tools release.
by: AMD
AMD High-Speed Ethernet LogiCORE™ (HSEC) is a high-performance and flexible implementation of the IEEE 802.32012 for 40Gbps and 100Gbps Ethernet.
For new designs in UltraScale™ and UltraScale+™, refer to the 40G/50G Ethernet Subsystem.
For new designs in UltraScale and UltraScale+™, refer to the UltraScale+ Integrated 100G Ethernet Subsystem and UltraScale Integrated 100G Ethernet Subsystem.
AMD 40G/100G Ethernet LogiCORE™ based on Sarance Technologies Best-In-Class Intellectual Property
AMD High-Speed Ethernet LogiCORE (HSEC) is a high-performance and flexible implementation of the IEEE 802.32012 for 40Gbps and 100Gbps Ethernet. The HSEC implements the 40G and 100G aggregate Physical Coding Sublayer (PCS), and a 40G and 100G Media Access Controller (MAC) module. The HSEC is the world’s first implementation of the IEEE 802.32012 specifications and has been successfully deployed in a major ISP’s network in the USA. AMD also sells the CAUI and XLAUI PCS layers standalone with optional Auto_Negotiation and FEC for backplane applications. AMD 40G and 100G Ethernet LogiCORE is based on Sarance Technologies Intellectual Property and is delivered as a netlist implemented in UltraScale and Virtex™ FPGA families.
The AMD 40G/100G Ethernet cores are provided in netlist form to licensed Ethernet customers only. The netlist is configured based upon user provided details. As described in the ordering information below, a confirmation email which includes configuration details will be sent to you.
The sole purpose of the Ethernet cores is to help you develop designs for AMD devices. AMD reserves the right to deny access to the Ethernet core products. The Ethernet cores are licensed under the Core Project License Agreement.
Contact your local sales representative to order an Ethernet product. As part of the purchasing process, you will be sent a confirmation email with configuration and access information. Some configurations may require up to 90 days for delivery once your order is complete.
LogiCORE™ Product Name
CAUI
100G Ethernet MAC + CAUI PCS
100G Ethernet PCS with AN/LT/FEC*
100G IEEE 802.3bj Reed-Solomon Forward Error Correction**
Part Number
EM-DI-CAUI-PROJ
EM-DI-100GEMAC-PROJ
EM-DI-100GBASE-KR4-PROJ
EF-DI-100G-RS-FEC-PROJ
EF-DI-100G-RS-FEC-SITE
Discontinued Part Numbers | Replacement Part Numbers | Description |
EM-DI-XLAUI-PROJ | EF-DI-LAUI-PROJ EF-DI-LAUI-SITE |
XLAUI/LAUI (40GBASE-R/50GBASE-R) |
EM-DI-40GEMAC-PROJ | EF-DI-50GEMAC-PROJ EF-DI-50GEMAC-SITE |
40G/50G Ethernet MAC + BASE-R |
EM-DI-40GBASE-KR4-PROJ | EF-DI-50GBASE-KR2-PROJ EF-DI-50GBASE-KR2-SITE |
50GBASE-KR2 (clause 74 FEC, AN) 40GBASE-KR4 (clause 74 FEC, AN) 50G RS-FEC (Standalone or adder to EF-DI-50GEMAC) |
Note: Configuration and Netlist Ship information below only applies to the CAUI and 100G Ethernet MAC + CAUI PCS part numbers.
As part of the notification for the Ethernet configuration, you will be asked to accept the Core Project License Agreement. The email address associated with your AMD.com account must be a valid company email address in order for the netlist to be approved.
Once you have executed the Core License Agreement and the core has been configured to specification, the LogiCORE IP for AMD FPGAs will be provided to you.
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.