Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The LogiCORE™ 400G IEEE 802.3bs Reed-Solomon Forward Error Correction IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer.
The LogiCORE™ 400G IEEE 802.3bs Reed-Solomon Forward Error Correction IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer.
The AMD 400G IEEE 802.3bs Reed Solomon Forward Error Correction is provided in netlist form to licensed 400G RS-FEC customers only. The netlist is configured based upon user provided details. As described in the ordering information below, a confirmation email which includes configuration details will be sent to you.
The sole purpose of the 40G RS-FEC core is to help you develop designs for AMD devices. AMD reserves the right to deny access to the IP core products. The 400G RS-FEC IP core is licensed under the Core License Agreement.
To purchase any of these IP cores, contact your local Sales Representative referencing the appropriate part number(s) in below table.
Description | License Key |
Part Number |
LogiCORE™, 400G IEEE 802.3bs Reed Solomon Forward Error Correction, Site License | ieee802d3_400g_rs_fec | EF-DI-400G-RS-FEC-SITE |
LogiCORE, 400G IEEE 802.3bs Reed Solomon Forward Error Correction, Project License | ieee802d3_400g_rs_fec | EF-DI-400G-RS-FEC-PROJ |
LogiCORE™ | Version | AXI4 Support | Software Support | Supported Device Families |
400G IEEE 802.3bs Reed Solomon Forward Error Correction (EF-DI-400G-RS-FEC-SITE) |
v3.0 | AXI4-Stream |
Vivado™ 2023.1 | Versal™ Kintex™ 7 UltraScale™ Virtex™ 7 UltraScale Kintex 7 UltraScale+™ Virtex 7 UltraScale |
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.