Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The NVMe™ Host Accelerator (NVMeHA) IP provides a simple and efficient interface to multiple NVMe drives, thereby offloading the MPSoC / FPGA embedded CPU from IO queue management, enabling a high throughput low latency storage solution.
The AMD NVMe™ Host Accelerator (NVMeHA) IP provides a simple and efficient interface to multiple NVMe drives, thereby offloading the MPSoC / FPGA embedded CPU from IO queue management, enabling a high throughput low latency storage solution. The IP provides a path for either software or hardware module(s) to interface with it's standard AXI memory map and streaming interfaces. The NVMeHA IP is fully parametrizable for customization, and comes with a software driver that can run in the ARM embedded CPU in the MPSoC or in a soft-IP Microblaze CPU on an FPGA.
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