Memory Interface

Memory Interface is a free software tool used to generate memory controllers and interfaces for AMD FPGAs.

Design Tools Support: Vivado Software, ISE Design Suite
Bundled With: Vivado Software, ISE Design Suite
License: End User License Agreement
Device Support: Artix 7, Kintex 7, Kintex UltraScale, Kintex UltraScale+, Virtex 7, Virtex UltraScale, Virtex UltraScale+, Versal AI Core, Versal Premium, Zynq 7000, Zynq UltraScale+ MPSoC

Vivado Release Notes

The most updated Release Note.

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Memory Inteface Solution Center

The Memory Interface Generator (MIG) Solution Center is available to address all questions related to the MIG.

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UltraScale™ Memory Interface IP Design Checklist

The memory type selection defines the Memory IP design rules.

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7 Series Memory Interface IP Design Checklist

The memory type selection defines the Memory IP design rules.

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UG086 - Memory Interface Solutions User Guide (UG086) (v3.6)

UG086 AMD Memory Interface Generator (MIG), User Guide

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UG388 - Spartan 6 FPGA Memory Controller User Guide (UG388) (v2.3)

Spartan™ 6 FPGA Memory Controller User Guide

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UG389 - Spartan 6 FPGA DSP48A1 Slice User Guide (UG389) (v1.2)

Spartan 6 FPGA DSP48A1 Slice User Guide

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UG393 - Spartan 6 FPGA PCB Design Guide (UG393) (v1.3)

Spartan 6 FPGA PCB Design Guide

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UG394 - Spartan 6 FPGA Power Management User Guide (UG394) (v1.3)

Spartan 6 FPGA Power Management User Guide

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UG406 - Virtex™ 6 FPGA Memory Interface Solutions User Guide (UG406) (v3.92)

Provides information about using, customizing, and simulating a LogiCORE™ IP memory interface core for the Virtex 6 FPGA.

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UG416 - Spartan 6 FPGA Memory Interface Solutions User Guide (AXI)(UG416) (v3.92)

Describes the design tool flow and debug procedures for external memory interfaces implemented with the MCB in Spartan 6 FPGAs

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UG586 - Zynq™ 7000 SoC and 7 Series Devices Memory Interface Solutions v4.2, User Guide (UG586) (v4.2)

Serves as a technical reference to using, customizing, and simulating DDR3 and DDR2 SDRAM, RLDRAM II, RLDRAM 3, QDRII+, and LPDDR2 memory interface cores.

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XAPP1215 - AXI Thin Film Transistor (TFT) Controller on the 7 Series Platform(XAPP1215) (v1.0)

This application note demonstrates a simple embedded display system using the LogiCORE™ IP AXI Thin Film Transistor (TFT) core on the Kintex 7 FPGA KC705 Evaluation Kit.

View Application Note xapp1215-axi-tft-on-7-series.zip

XAPP1218 - AXI VDMA Reference Design for the Kintex FPGA KC705 Evaluation Board Application Note (XAPP1218) (v2.0)

This application note demonstrates how to use the LogiCORE IP AXI Video DMA (VDMA) core in a typical video application.

View Application Note xapp1218-axi-vdma-for-kc705.zip

XAPP739 - AXI Multi-Ported Memory Controller Application Note (XAPP739) (v1.0)

This application note demonstrates how to create a basic DDR3 MPMC design using ISE Logic Edition tools including Project Navigator (ProjNav) and CORE Generator software.

View Application Note xapp739_axi_mpmc.zip

DH251 - UltraScale DDR4/DDR3 Memory Design Hub (DH251) (v1.0)

View Design Hub

DH252 - UltraScale QDR II+ SRAM Memory Design Hub (DH252) (v1.0)

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DH253 - UltraScale Device RLDRAM 3 Memory Design Hub (DH253) (v1.0)

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PG150 - UltraScale Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150) (v1.4)

Provides information about using, customizing, and simulating the DDR3 or DDR4 SDRAM, LPDDR3 SDRAM, QDR II+ SRAM, QDR-IV SRAM, or a RLDRAM 3 interface core. It also describes the core architecture and provides details on customizing and interfacing to the core.

View Product Guide gdrlip.html qdriv.html xtp359-memory-ip-ultrascale-design-checklist.zip

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Memory Interface

Product Description

Key Features and Benefits

Documentation

Release Notes, Solutions, & Checklists

User Guides

Application Notes

XAPP1215 - AXI Thin Film Transistor (TFT) Controller on the 7 Series Platform(XAPP1215) (v1.0)

XAPP1218 - AXI VDMA Reference Design for the Kintex FPGA KC705 Evaluation Board Application Note (XAPP1218) (v2.0)

XAPP739 - AXI Multi-Ported Memory Controller Application Note (XAPP739) (v1.0)

Design Hubs

Product Guides

PG150 - UltraScale Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150) (v1.4)

Data Sheets