Design Flow Assistant
Interactive guide to help you create a development strategy.
Overview
Accelerate Host Connectivity
FPGA industry’s first adaptive SoCs and FPGAs with integrated PCIe® Gen6 and CXL® 3.11 enabling 2X the bandwidth per lane compared to competing FPGAs.2
Unlock More Memory Faster
Multiply your external memory bandwidth using hardened memory controllers supporting LPDDR5X up to 8533 Mb/s, DDR5 up to 6400 Mb/s, and CXL memory expansion modules at up to 64 Gb/s.3,4
Strengthen Data Security
Secure data in transit and at rest with integrated PCIe Integrity and Data Encryption (IDE) support in hard IP, hard inline ECC, and encryption for external memory.
Capitalize on Industry-leading, High-Bandwidth Host Connectivity
Boost overall system throughput and resource utilization to meet the demands of data-intensive applications with AMD Versal™ Premium Series Gen 2, the industry’s first FPGA or adaptive SoC offering support for PCIe Gen6 and CXL 3.1 at 64 Gb/s in hard IP.1
Gain Access to More Memory Resources with Dynamically Allocated Memory Pooling
Did you know you can reduce memory bottlenecks and speed data flow to accelerate data-intensive applications and reveal valuable insights? Discover 5 ways Versal Premium Series Gen 2 adaptive SoCs unlock more memory faster to boost overall system throughput.
Product Advantages
Introducing the Versal Premium Series Gen 2
Extending AMD Versal Premium Series adaptive SoC capabilities, Versal Premium Series Gen 2 delivers new interfacing capabilities, including an enhanced transceiver architecture, support for PCIe Gen6 CXL 3.1, LPDDR5X, and DDR5, and is tailored to meet the requirements of tomorrow’s data-intensive applications.
Image Zoom
See the data sheet overview for the available feature combinations per device/package.
Key Features
Enhanced Transceiver Architecture
Versal Premium Series Gen 2 adaptive SoCs feature a new transceiver architecture, operating in NRZ and PAM4 modes and offering high-speed data transfer rates from 1.25 Gb/s to 128 Gb/s.5 In addition to PCIe Gen5 and 100G/600G Ethernet cores, Versal Premium Series Gen 2 adaptive SoCs also offer support for CXL 3.1, which provides a memory-coherent processor interface, and PCIe Gen6, which offers double the bandwidth per channel compared to PCIe Gen5.2
DDR5 & LPDDR5X
Hard DDR memory controllers support DDR5 at up to 6400 Mb/s and LPDDR5X at up to 8533 Mb/s with new inline ECC and crypto functionality—delivering up to 273 GB/s memory bandwidth.
Safety and Security Features
Help protect data with PCIe Integrity and Data Encryption (IDE) for data in transit, inline memory encryption built into dedicated memory controllers for data at rest, and 400G High-Speed Crypto Engines for up to 800 Gb/s of line rate encryption throughput for high bandwidth interfaces.
Multirate Ethernet Cores with FEC
The dedicated connectivity IP enables secure multi-terabit Ethernet with support for a wide range of data rates and protocols. The mix of 100G and 600G Ethernet cores delivers up to 3.1 Tb/s of throughput and allows scalability in the cloud and at the edge—all on a single platform.
Programmable Logic & I/O
The Versal architecture’s programmable logic and new high-performance X5IO with MIPI D-PHY at up to 4.5 Gb/s and C-PHY at up to 10 Gb/s support provide flexibility, real-time processing, and future adaptability.
Programmable Network on Chip
The programmable network on chip (NoC) provides an optimized multi-terabit interconnect between the different compute engines and integrated IP blocks in Versal adaptive SoCs, simplifying timing closure and saving logic resources. The NoC compiler provides a streamlined programming experience while allowing users to manage latency and QoS for critical datapaths.
Explore Additional Versal Adaptive SoC Features
Versal Premium Series Gen 2 Product Brief
Learn how Versal Premium Series Gen 2 adaptive SoCs enable solutions that unlock the value of data at scale with advanced connectivity and security solutions for tomorrow’s most data- and bandwidth-intensive applications.
Applications & Industries
AMD Versal Premium Series Gen 2 Adaptive SoCs for Data Center Storage Applications
Versal Premium Series Gen 2 devices are ideal for a wide range of storage applications in the data center including custom enterprise SSDs, encryption/compression accelerators, memory pooling, and live migration. The addition of CXL 3.1 in Versal Premium Series Gen 2 allows for the ability to add memory expansion and move computational tasks closer to memory addressing their most memory intensive requirements.
AMD Versal Premium Series Gen 2 for Swap-Optimized Compute in Aerospace and Defense Applications
Versal Premium Series Gen 2 extends the proven Versal Premium Series adaptive SoCs with higher-density compute, increased memory bandwidth, upgraded I/O & GTs, and enhanced security features—all optimized for small form-factor systems, packing over 4000 DSP58 blocks into a 35x35 mm package and over 7500 DSP58 blocks into a 3U VPX compatible package.
MIPI C-PHY/D-PHY Test Solutions with AMD Versal Premium Series Gen 2
With enhanced MIPI C-PHY/D-PHY silicon features and corresponding CSI and DSI solutions, Versal Premium Series Gen 2 supports emerging connectivity standards in display and camera testing.
Meeting Next-Generation Instrumentation Requirements with AMD Versal Premium Series Gen 2
Next-generation testing instruments require enhanced SerDes capabilities to support emerging standards along with significant I/O and memory bandwidth. Versal Premium Series Gen 2 meets these requirements with improvement in SerDes and high-throughput PCIe and DMA capabilities.
Product Specifications
Processing System
2VP3102 |
2VP3202 |
2VP3402 |
2VP3602 |
|
Application Processor |
Dual-core Arm® Cortex® A72, 48 KB/32 KB L1 Cache w/ parity & ECC; 1 MB L2 Cache w/ ECC |
|||
Real-Time Processor |
Dual-core Arm Cortex R5F, 32 KB/32 KB L1 Cache, and 256 KB TCM w/ECC |
|||
Memory |
256 KB On-Chip Memory w/ECC |
|||
Connectivity |
Ethernet (x2); UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2) |
|||
Programmable Logic
2VP3102 |
2VP3202 |
2VP3402 |
2VP3602 |
|
System Logic Cells |
1,407,560 |
1,743,560 |
2,561,160 |
3,273,480 |
LUTs |
643,456 |
797,056 |
1,170,816 |
1,496,448 |
DSP Engines |
3,332 |
4,004 |
6,080 |
7,616 |
Memory, Interface, I/O & Transceivers
2VP3102 |
2VP3202 |
2VP3402 |
2VP3602 |
|
Total PL Memory1 (Mb) |
145 |
178 |
256 |
327 |
Max. Memory Bandwidth (LPDDR5X) |
137 GB/s |
137 GB/s |
273 GB/s |
273 GB/s |
100G Multirate Ethernet MAC |
2 |
2 |
1 |
1 |
600G Ethernet MAC |
1 |
2 |
3 |
5 |
400G High-Speed Crypto Engines |
2 |
2 |
1 |
1 |
LDPC Decoder |
4 |
6 |
- |
- |
PCIe® w/ DMA, CXL (CPM6) |
2 x Gen6x8/CXL 3.1 |
2 x Gen6x8/CXL 3.1 |
2 x Gen6x8/CXL 3.1 |
2 x Gen6x8/CXL 3.1 |
High-Performance I/O (X5IO) |
416 |
416 |
736 |
736 |
GTM2 Transceivers (PL-Only – 112G3, 56G) |
8, 8 |
8, 8 |
40,0 |
56, 0 |
GTM2 Transceivers (CPM6/GT Direct mode – 64G/32G)2 |
16 |
16 |
16 |
16 |
- Total PL Memory = Distributed RAM + Total Block RAM + UltraRAM
- Up to 64G in CPM6 mode. Up to 32G in GT Direct mode
- Contact AMD for 128 Gb/s support details
For All Developers
AMD provides the leadership software development environment for designing with adaptive SoCs and FPGAs—this includes tools (compilers, simulators, etc.), IP, and solutions.
This environment can reduce development time while allowing developers to achieve high performance per watt. These tools enable all types of developers (application and algorithm engineers, embedded software developers, and traditional hardware developers) to use AMD adaptive computing solutions.
Resources
Early Access Program
The Versal AI Edge Series Gen 2 is currently in Early Access. Contact your local AMD sales representative to apply for the Early Access program or visit the Contact Sales page.
Stay Informed
Join the Versal adaptive SoC notification list to receive the latest news and updates.
Footnotes
- Based on an AMD internal analysis of AMD Versal Premium Series Gen 2 devices with CXL 3.1 and PCIe 6.0 vs. comparable competitive devices without CXL 3.1 and/or with PCIe Gen 4/5, as of July 2024. (VER-055)
- Based on an AMD internal analysis of the AMD Versal Premium Series Gen 2 devices with PCIe Gen6 vs. competitive and prior generation AMD Versal Premium Series devices with PCIe Gen4/5, as of July 2024. Actual line rate speeds will vary based on system configuration and other factors. (VER-057)
- Based on an AMD internal analysis of Versal Premium Series Gen 2 device DDR/LPDDR memory interface specifications vs. comparable competitive devices, as of July 2024. Actual performance will vary based on system configuration and other factors. (VER-058)
- Based on an AMD internal analysis of the total memory bandwidth (CXL 3.1 and LPDDR5X memory components) available with AMD Versal Premium Series Gen 2 devices vs. the same devices with LPDDR5X memory alone. Memory bandwidth will vary based on system configuration and other factors. (VER-059)
- Data is preliminary and subject to change. (VER-063)
Footnotes
- Based on an AMD internal analysis of AMD Versal Premium Series Gen 2 devices with CXL 3.1 and PCIe 6.0 vs. comparable competitive devices without CXL 3.1 and/or with PCIe Gen 4/5, as of July 2024. (VER-055)
- Based on an AMD internal analysis of the AMD Versal Premium Series Gen 2 devices with PCIe Gen6 vs. competitive and prior generation AMD Versal Premium Series devices with PCIe Gen4/5, as of July 2024. Actual line rate speeds will vary based on system configuration and other factors. (VER-057)
- Based on an AMD internal analysis of Versal Premium Series Gen 2 device DDR/LPDDR memory interface specifications vs. comparable competitive devices, as of July 2024. Actual performance will vary based on system configuration and other factors. (VER-058)
- Based on an AMD internal analysis of the total memory bandwidth (CXL 3.1 and LPDDR5X memory components) available with AMD Versal Premium Series Gen 2 devices vs. the same devices with LPDDR5X memory alone. Memory bandwidth will vary based on system configuration and other factors. (VER-059)
- Data is preliminary and subject to change. (VER-063)