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XPS Central DMA Controller

The XPS Central DMA Controller provides simple Direct Memory Access (DMA) services to peripherals and memory devices on the PLB.

Design Tools Support: Embedded Development Kit
Bundled With: Embedded Development Kit
License: End User License Agreement
Device Support: Virtex 6, Spartan 6, Spartan 3

Overview
Documentation

Product Description

The XPS Central DMA Controller provides simple Direct Memory Access (DMA) services to peripherals and memory devices on the PLB. The controller transfers a programmable quantity of data from a source address to a destination address without processor intervention.

Key Features and Benefits

Connects as a 32-bit master/slave on PLB V4.6 buses of 32, 64 or 128 bits
Provides a single physical channel of Direct Memory Access between a source address and a destination address
Provides programmable registers for source address, destination address and transfer length
Supports different clock domains for Master and Slave interfaces
Supports setting up of source and destination addresses as incrementing or fixed (keyhole)
Supports PLB burst transfers

Documentation

DS579 - LogiCORE IP XPS Central DMA Controller (v2.03a) Data Sheet (DS579) (v3.4)

View Data Sheet

DS649 - LogiCORE IP XPS Controller Area Network (CAN) (v3.01a) Data Sheet (DS649) (v4.2)

The LogiCORE™ IP Controller Area Network (CAN) product specification defines the architecture and features of the AMD CAN controller core. This document also defines the addressing and functionality of the various registers in the design, in addition to describing the user interface.

View Data Sheet

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XPS Central DMA Controller

Product Description

Key Features and Benefits

Documentation

DS579 - LogiCORE IP XPS Central DMA Controller (v2.03a) Data Sheet (DS579) (v3.4)

DS649 - LogiCORE IP XPS Controller Area Network (CAN) (v3.01a) Data Sheet (DS649) (v4.2)

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