Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The Accumulator IP provides LUT and single DSP slice accumulation implementations.
The Accumulator IP provides LUT and single DSP slice accumulation implementations. The Accumulator module can implement adder-based, subtracter-based, and dynamically configurable adder/subtracter-based accumulators operating on signed or unsigned data. The Accumulator module can generate adder-based, subtracter-based and adder/subtracter-based accumulators operating on signed or unsigned data. The function can be implemented in a single DSP slice or LUTs (but currently not a hybrid of both). Pipelining is available for both implementations.
LogiCORE™ | Version | Software Support | Supported Device Families |
---|---|---|---|
Accumulator | v12.0 | Vivado™ 2020.2 | Versal™ Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ Kintex UltraScale™ Virtex UltraScale Zynq 7000 Artix™ 7 Kintex 7 Virtex 7 / XT |
Accumulator | v11.0 | ISE™ 14.1 | Artix 7 Kintex 7 Virtex 7 / XT Virtex 6 CXT / HXT / SXT / LXT / -1L Virtex 5 TXT / SXT / LXT / FXT Virtex 4 SX / LX / FX Spartan™ 6 LX / LXT Spartan 3A / 3A DSP Spartan 3 / 3E |
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