Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
by: AMD
The LogiCORE™ Binary Counter IP core provides LUT and single DSP48 slice implementations.
The LogiCORE™ Binary Counter IP core provides LUT and single DSP48 slice implementations. The Binary Counter is used to created up counters, down counters, and up/down counters with outputs of up to 256-bits wide. Support is provided for one threshold signal that can be programmed to become active when the counter reaches a user defined count. The upper limit of the count is user programmable and the counter’s increment value can be user defined. When the counter reaches terminal count or the count to value, the next count is zero.
LogiCORE™ | Version | Software Support | Supported Device Families |
---|---|---|---|
Binary Counter | v12.0 | Vivado™ 2020.2 | Versal™ Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ Kintex UltraScale™ Virtex UltraScale Zynq 7000 Artix™ 7 Kintex 7 / -2L Virtex 7 / -2L / XT |
Binary Counter | v11.0 | ISE™ 14.1 | Artix 7 Kintex 7 / -2L Virtex 7 / -2L / XT Virtex 6 CXT / HXT / SXT / LXT/ -1L Virtex 5 TXT / SXT / LXT / FXT Virtex 4 SX / LX / FX Spartan™ 6 LX / LXT Spartan 3A / 3A DSP Spartan 3 / 3E |
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