Vivado IP Release Notes
This article contains a list of all 'Vivado™ IP Release Notes - All IP Change Log Information' answer records and the associated Vivado Tools release.
作成者: AMD
The LogiCORE™ IP High Speed Ethernet IP Subsystem implements the 40G or 50G Ethernet Media Access Controller (MAC) with a Physical Coding Sublayer (PCS) or standalone PCS.
The LogiCORE™ IP 40G/50G Ethernet solution provides a 40 Gigabit or 50 Gigabit per second (Gbps) Ethernet Media Access Controller integrated with a PCS/PMA in BASE-R/KR modes or a standalone PCS/PMA in BASE-R/KR modes. The core is designed to work with the latest UltraScale™ and UltraScale+™ FPGAs.
The 50G Ethernet IP is designed to the new 25G/50G Ethernet Consortium standard and supports the demand of cloud data centers to enable lower cost and increased performance solutions between the server and the top of rack switch and to increase the front panel density.
The evaluate button above licenses the 40G/50G Ethernet MAC + PCS/PMA (50GEMAC), Evaluation License option. If you also require to use 40/50G Ethernet PCS/PMA with FEC/Auto-Negotiation (40G-KR4/50-KR2) or the XLAUI/LAUI, please use the evaluation links below. (See the Order tab for more details)
The AMD 40G/50G Ethernet MAC/PCS is provided in netlist form to licensed Ethernet customers only. The netlist is configured based upon user provided details. As described in the ordering information below, a confirmation email which includes configuration details will be sent to you.
The sole purpose of the Ethernet cores is to help you develop designs for AMD devices. AMD reserves the right to deny access to the Ethernet core products. The Ethernet cores are licensed under the Core Project License Agreement.
To purchase any of these IP cores, contact your local Sales Representative referencing the appropriate part number(s) in below table.
Description | Part Number | License Key |
40G/50G Ethernet MAC + BASE-R* | EF-DI-50GEMAC-PROJ EF-DI-50GEMAC-SITE |
l_eth_mac_pcs |
50GBASE-KP (RS-FEC (544, 514)**/*** AN/LT) 50GBASE-KR2 (RS-FEC (528, 514), AN/LT) 40GBASE-KR4 (clause 74 FEC, AN/LT) 50G RS-FEC (Standalone or adder to EF-DI-50GEMAC) XLAUI/LAUI (40GBASE-R/50GBASE-R) |
EF-DI-50GBASE-KR2-PROJ EF-DI-50GBASE-KR2-SITE |
l_eth_basekr ieee802d3_50g_rs_fec l_eth_baser |
XLAUI/LAUI (40GBASE-R/50GBASE-R) (AN/LT/FEC are not included in this part number) |
EF-DI-LAUI-PROJ EF-DI-LAUI-SITE |
l_eth_baser |
*For access to standalone XLAUI/LAUI (40GBASE-R/50GBASE-R), you must order EF-DI-LAUI-XXXX or EF-DI-50GBASE-KR2-xxxx **50G RS-FEC (544, 514) is available as a hardened IP inside UltraScale+™ 58G devices in the GTM transceiver for no additional charge |
As part of the notification for the Ethernet configuration, you will be asked to accept the Core Project License Agreement. The email address associated with your AMD.com account must be a valid company email address in order for the netlist to be approved.
Once you have executed the Core License Agreement and the core has been configured to specification, the LogiCORE™ IP for AMD FPGAs will be provided to you.
Hardware Evaluation Time Out Period * : ~ 8 hrs
LogiCORE™ | Version | AXI4 Support | Software Support | Supported Device Families |
---|---|---|---|---|
40G/50G Ethernet Subsystem |
v3.3 | AXI4-Stream | Vivado™ 2024.2 | Versal™ Adaptive SoC Kintex™ UltraScale+™ Virtex™ UltraScale+ Zynq™ UltraScale+ MPSoC Zynq UltraScale+ RFSoC Kintex Ultrascale™ Virtex UltraScale |
Certain AMD technologies may require third-party enablement or activation. Supported features may vary by operating system. Please confirm with system manufacturer for specific features. No technology or product can be completely secure.