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Reduced Media Independent Interface (RMII)

von: AMD

The MII to RMII LogiCORE™ is a "shim" core.

Design Tools Support: Vivado Software, ISE Design Suite
Bundled With: Vivado Software, Embedded Development Kit
Lizenz: End User License Agreement
Device Support: Artix 7, Kintex 7, Virtex 6, Virtex 7, Zynq 7000, Spartan 6, Virtex 4, Virtex 5

Overview
Documentation

Product Description

The MII to RMII LogiCORE™ is a "shim" core which converts a traditional 16-pin Media Independent Interface (MII) on an AMD 10/100 Ethernet MAC core to a a 6-pin Reduced Media Independent Interface (RMII) interface, allowing the MAC to connect to RMII compliant PHYs. A fixed 50 MHz reference clock synchronizes the MII_to_RMII with both interfaces.

Key Features and Benefits

Option to specify fixed 10 or 100 Mbit per second throughput
Automatic detection of Receive side throughput
Fixed clock frequency of 50 MHz Designed to RMII Consortium specification
Free core provided with the Embedded Development Kit (EDK™)

Documentation

Vivado Release Notes

The most updated Release Note.

View Release Note

PG146 - MII to RMII v2.0 Product Guide (PG146) (v2.0)

This document describes the Media Independent Interface to Reduced Media Independent core that provides the RMII between RMII-compliant ethernet physical media devices (PHY) and AMD 10/100 Mb/s ethernet cores such as the XPS LL TEMAC and XPS Ethernet Lite.

View Product Guide

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Reduced Media Independent Interface (RMII)

Product Description

Key Features and Benefits

Documentation

Vivado Release Notes

PG146 - MII to RMII v2.0 Product Guide (PG146) (v2.0)

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