作成者: AMD
The Soft-Decision Forward Error Correction (SD-FEC) integrated block supports Low Density Parity Check (LDPC) decoding and encoding and Turbo code decoding.
For many current and emerging high data rate applications such as 4G, 5G and DOCSIS3.1 Cable Access, transmission reliability is a key success factor to support the quality of the overall system. A high performance Soft-Decision FEC (i.e. >1 Gbps), is a major building block used to enable these systems to function under non-ideal environments.
The Soft-Decision Forward Error Correction (SD-FEC) integrated block supports Low Density Parity Check (LDPC) decoding and encoding and Turbo code decoding. The LDPC codes used are highly configurable, and the specific code used can be specified on a codeword-by-codeword basis.
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